1. Field of the Invention
Example embodiments of the present invention relate to a method of forming a pattern and a method of manufacturing a capacitor using the method of forming a pattern. More particularly, example embodiments of the present invention relate to a method of forming a pattern having a cylindrical shape and a method of manufacturing a capacitor using the method of forming a pattern.
2. Description of the Related Art
Generally, a capacitor employed in an electronic device, for example, a dynamic random access memory (DRAM) device, includes a lower electrode, a dielectric layer and an upper electrode. Recently, the area of a unit cell in DRAM devices has been reduced as integration of DRAM devices has been increased to have a giga-size. As the size of DRAM devices decreases, the capacitors in the cells of the DRAM devices have had to be modified to maintain the capacitance needed for optimum operation. In some instances, this modification has included modifying the shape of the capacitor. For example, capacitors that originally had a substantially flat shape have been modified to have a box shape or a cylindrical shape, which allows the capacitor to maintain a relatively large aspect ratio while having an overall size reduction.
The cylindrical capacitor typically includes a lower electrode having a cylindrical shape. A buffer layer pattern may be used in a node-separation process for forming the lower electrode having the cylindrical shape, and examples of a material that may be used for the buffer layer pattern may include an oxide, a photosensitive material, etc.
In order to form a buffer layer pattern including an oxide, the buffer oxide layer is formed through an oxide deposition process, where the buffer oxide layer is then etched through an etch-back process or chemical mechanical polishing process. Accordingly, forming the butter layer pattern requires a relatively long amount of time for the deposition process and the etching process. Additionally, a void may be formed in the buffer layer pattern. To prevent a void from forming in the buffer layer pattern, an atomic layer deposition process is required to form a buffer layer pattern.
In order to form the buffer layer pattern including a photosensitive material, a photoresist film is formed. After this photoresist film is formed, an exposing process, a developing process using a developing solution, a cleaning process, and a baking process are sequentially performed on the photoresist film. However, these processes require high cost exposure devices, which may increase the overall cost of forming the buffer layer pattern. Furthermore, the baking process that hardens the photoresist film typically requires a temperature of more than about 270° C. and also generally requires an ashing process to remove the hardened photoresist film.
However, the lower electrode of the buffer layer pattern may be damaged while the ashing process and the cleaning process are performed. Furthermore, buffer layer patterns are not easily removed by conventional and plasma ashing processes. In addition, residues of the buffer layer pattern remaining in an opening may serve as a resistance to cause malfunction of the capacitor. In order to improve the efficiency of the ashing process for removing the buffer layer pattern, an oxygen plasma ashing process may be performed at a high temperature of about 150° C. to about 250° C. However, the high temperature ashing process may deteriorate and/or oxidize the lower electrode so that the capacitor does not have a desired electric capacitance. These and other problems in the conventional art are addressed by embodiments of the present invention.